"TCAD Investigation of Abnormal Degradation if Inhibited Cells in NAND Flash Structures"
J. Postel-Pellerin, F. Lalande, P. Canet, R. Bouchakour,
F. Jeuland*, B. Bertello*, B. Villard
Aix-Marseille Universite, Marseille, France, *ATMEL
Corporation, Rousset, France
P-2
"A New F(ast)-CMOS Algorithm for Efficient Three-Dimensional NEGF Simulations of Arbitrarily Shaped Silicon Nanowire MUGFETs"
A. Afzalian, C.-W. Lee, N. Dehdashti Akhavan, R. Yan,
I. Ferain, P. Razavi, J.-P. Colinge
Tyndall National Institute, Cork, Ireland
P-3
"Accurate Mobility and Energy Relaxation Time Models for SiGe HBTs Numerical Simulation"
G. Sasso, G. Matz*, C. Jungemann*, N. Rinaldi
University of Naples, Naples, Italy, *Bundeswehr University,
Neubiberg, Germany
P-4
"Impact of Thickness and Deposition Temperature of Gate Dielectric on Valence Bands in Silicon Nanowires"
H. Xu, Y. He, C. Fan*, Y. Zhao, G. Du, J. Kang, R. Han, X. Liu
Peking University & Minstry of Education, Beijing, China,
*Peking University, Beijing, P.R. China
P-5
"TCAD Analysis of a Vertical RF Power Transistor"
W. Z. Cai, B. Gogoi, R. B. Davies, D. Lutz, D. Rice,
G. H. Loechelt*, G. Grivna*
HVVi Semiconductors, Phoenix, AZ, *ON Semiconductor,
Phoenix, AZ
P-6
"Using TCAD, Response Surface Model and Monte Carlo Methods to Model Processes and Reduce Device Variation"
D. Basu, J. Guha*, P. Hatab*, P. Vaidyanathan*,
S. K. Groothuis**, C. Mouli*
University of Texas at Austin, Austin, TX, *Micron Technology,
Boise, ID, **Consultant, SimuTech Group
P-7
"Semiclassical Monte Carlo with Quantum-Confinement Enhanced Scattering: Quantum Correction and Application to Short-Channel Device Performance vs. Mobility for Biaxial-Tensile-Strained Silicon nMOSFETs"
N. Shi, L. F. Register, S. K. Benerjee
University of Texas at Austin, Austin, TX
P-8
"Population Inversion and Negative Dynamic Conductivity in Optically Pumped Graphene"
A. Satou, F. T. Vasko*, T. Otsuji**, V. Ryzhii
University of Aizu, Aizu-Wakamatsu, Japan, *NAS of Ukraine, Kiev, Ukraine, **Tohoku University, Sendai, Japan
P-9
"Comparative Study on Si and Ge p-type Nanowire FETs based on Full-Band Non-Equilibrium Green's Function Simulation"
H. Minari, N. Mori
Osaka University, Osaka, Japan
P-10
"Adding Physical Scalability to BSIM4 by Meta-Modeling of Fitting Parameters"
T. Nagumo, K. Takeuchi, S. Kumashiro, Y. Hayashi
NEC Electronics Corp., Kanagawa, Japan
P-11
"Simulation on NBTI Degradation Due to Discrete Interface Traps Considering Local Mobility Model and its Statistical Effects"
S. W. Choi, C.-K. Baek*, S. Park, H. H. Park, Y. J. Park
Seoul National University, Seoul, Korea, *Korea Institute for
Advanced Study, Seoul, Korea
P-12
"Monte Carlo Study of Ambipolar Transport and Quantum Effects in Carbon Nanotube Transistors"
H. N. Nguyen, S. Retailleau, D. Querlioz, A. Bournel, P. Dollfus
Universite Paris-Sud, Orsay, France
P-13
"Simulation of Layout-Dependent STI Stress and Its Impact on Circuit Performance"
L. Yang, X. Li, L. Tian, Z. Yu
Tsinghua University, Beijing, China
P-14
"Full Quantum Investigation of Low Field Mobility in Short-Channel Silicon Nanowire FETs"
S. Poli, M. G. Pala*
University of Bologna, Italy, *IMEP-LAHC, Grenoble, France
P-15
"Integrated Stress and Process Calibration in Strained-Si Devices"
T.-H. Yu, K.-C. Tu, Y.-M. Sheu, C. H. Diaz
TSMC, Hsinchu, Taiwan
P-16
"SPICE Modeling of Self Sustained Operation (SSO) to Program Sub 90nm Floating Body Cells"
M. Gupta, S. Bhardwaj, J. Kwon, V. Gopinath
Innovative Silicon Inc., Santa Clara, CA
P-17
"Comparison of In0.7Ga0.3As and Si as Material of Choice for Low-Power High Performance Logic Devices: A Theoretical Investigation"
T. Rakshit, N. Neophytou*, H. Pal**, G. Dewey, M. Hudait,
M. Radosavljevic
Intel Corporation, *TU Vienna, Austria, **Purdue University
P-18
"2D Quantum Mechanical Simulation of Gate-Leakage Current in Double-Gate n-MOSFETs"
S. Muraoka, R. Mukai, S. Souma, M. Ogawa
Kobe University, Kobe, Japan
P-19
"Particle-based Simulation of Conductance of Solid State Nanopores and Ion Channels"
C. Berti, S. Furini*, S. Cavalcanti*, E. Sangiorgi*, C. Fiegna*
University of Bologna and IUNET, Cesena, Italy, University of
Bologna, Bologna, Italy