Machine Learning I
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14:30 – 14:50 |
A Novel Methodology for Neural Compact Modeling Based on Knowledge Transfer Ye Sle Cha, Junghwan Park, Chanwoo Park, Soogine Chong, Chul-Heung Kim, Chang-Sub Lee, Intae Jeong and Hyunbo Cho Research & Development Center, Alsemy Inc. (Korea) |
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14:50 – 15:10 |
Graph-based Compact Modeling of CMOS Transistors for Efficient Parameter Extraction: A Machine Learning Approach Amol D. Gaidhane, Ziyao Yang and Yu Cao School of ECEE, Arizona State University (USA) |
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15:10 – 15:30 |
Hierarchical Mixture-of-Experts Approach for Neural Compact Modeling of MOSFETs Chanwoo Park, Premkumar Vincent, Soogine Chong, Junghwan Park, Ye Sle Cha and Hyunbo Cho Research & Development Center, Alsemy Inc. (Korea) |
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15:30 – 15:50 |
Quantum Element Method for Multi-Dimensional Nanostructures Enabled by a Projection-based Learning Algorithm Martin Veresko and Ming-C. Cheng Dept. of ECE, Clarkson University (USA) |
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15:50 – 16:10 |
Vertical GaN Diode BV Maximization through Rapid TCAD Simulation and ML-enabled Surrogate Model Albert Lu1, Jordan Marshall1, Yifan Wang2, Ming Xiao2, Yuhao Zhang2 and Hiu Yung Wong1 1Electrical Engineering, San Jose State University (USA) 2Center for Power Electronics Systems, Virginia Polytechnic Institute and State University (U.S.A) |