Program for: September 6, 2006
September 7, 2006
September 8, 2006
| P-1 | "Monte Carlo Study of Remote Coulomb and Remote
Surface Roughness Scattering in Nanoscale Ge PMOSFETs
with Ultrathin High-k Dielectrics" B. Ghosh, X-F. Fan, L. F. Register, S.K. Banergee, University of Texas at Austin, Austin, TX |
| P-2 | "Efficient 2D Approximation for Layout-dependent
Relaxation of Etch Stop Liner Stress due to Contact Holes" R. Liebmann, M. Nawaz, K.H.Bach, Infineon Technologies AG, Munich, Germany |
| P-3 | "Optimization of Halo Implant using 3D TCAD for
Nanoscale MuGFETs" M. Nawaz, P. Haibach, W. Molzer, Infineon Technologies AG, Munich, Germany |
| P-4 | "AC Conductance of Finite-length Carbon Nanotubes" Y. He, D. Hou, X. Liu, C. Fan, R. Han, Peking University, Beijing, P.R. China |
| P-5 | "Novel Mechanism of Neutron-induced Multi-cell Error in
CMOS Devices Tracked down from 3D Device Simulation" H. Yamaguchi, E. Ibe, Y. Yahagi, S. Yamamoto*, T. Akioka*, H. Kameyama*, Hitachi, Ltd., Yokohama, Japan, *Renesas Kodaira Semiconductor Co. Ltd., Japan |
| P-6 | "Ultra Fast Full Quantum Capacitance and Current-Voltage
Calculations of MOS Capacitors" C. Busseret, N. Baboux, C. Plossu, A. Poncet, LPM-INSA de Lyon, Villeurbanne, France |
| P-7 | "Three-Dimensional Simulation of Intrinsic Stress Build-up
in Thin Films" H. Ceric, C. Hollauer, S. Selberherr, TU Vienna, Vienna, Austria |
| P-8 | "Monte-Carlo Simulation of Ultimate
DGMOS Based on a Pearson Effective Potential Formalism" M-A. Jaud, S. Barraud, P. Dollfus*, H. Jaouen**, G. Le Carval, CEA-DRT-LETI, Grenoble, France, *CNRS Universite Paris Sud, France, **STMicroelectronics, Crolles, France |
| P-9 | "Efficient Density Gradient Quantum Corrections for 3D
Monte Carlo Simulation" C. Riddet, A. R. Brown, C. Alexander, C. Millar, S. Roy, A. Asenov, University of Glasgow, Scotland, UK |
| P-10 | "Doping Dependent Conductivity in Organic
Semiconductors" L. Li, G. Meller, H. Kosina, TU Vienna, Vienna, Austria |
| P-11 | "The Effect of Electron-Phonon Interaction on the Static
and Dynamic Response of CNTFETs" M. Pourfath, H. Kosina, B. H. Cheong, W. J. Park, S. Selberherr, TU Vienna, Wien, Austria |
| P-12 | "3D Mesh Generation with Wavelet-Driven Adaptivity" L. De Marchi, E. Baravelli, F. Franze, N. Speciale, University of Bologna, Bologna, Italy |
| P-13 | "Efficient Multi Sub-band Monte Carlo Simulation of Nano-
scaled Double Gate MOSFETs" J. Saint-Martin, D. Querlioz, A. Bournel, P. Dollfus, Universite Paris Sud, Orsay, France |
| P-14 | "Impact of Wafer and Technology Selection on Liner Stress
Mobility Enhancement" M. Mochizuki, K. Fukuda, Oki Electric Industry Co., Tokyo, Japan |
| P-15 | "Modeling of Cross-Talk Effects in Floating-Gate Devices
Using TCAD Simulations" Y. Saad*,**, M. Ciappa**, P. Pfaffli*, L. Bomholt*, W. Fichtner*,**, *Synopsys Switzerland LLC, Zurich, Switzerland, **ETH-Zentrum, Zurich, Switzerland |
| P-16 | "A Semi-analytical Model for the Subthreshold Behavior of
SOI FinFLASH Structures" L. Perniola, J. Razafindramora, P. Scheiblin, F. Dauge, C. Jahan, B. De Salvo, G. Reimbold, F. Boulanger, G. Ghibaudo*, CEA-LETI, Grenoble, France, *INP Grenoble MINATEC, Grenoble, France |
| P-17 | "Scalability of Biaxially Strained Si NMOS on Technology
Roadmap" X. Fan, L. F. Register, B. Ghosh, S. K. Banerjee, B. Winstead*, U. Ravaioli**, The University of Texas at Austin, Austin, TX, *Freescale Semiconductor, Inc., Austin, TX., **University of Illinois at Urbana- Champaign, Urbana, IL |
| P-18 | "Electron Transport at Technologically Significant Stepped
4H-SiC/SiO2 Interfaces" G. Pennington, S. Potbhare, J. M. McGarrity, N. Goldsman, A. Lelis*, C. Ashman**, University of Maryland, College Park, MD, *U.S. Army Research Laboratory, Adelphi, MD, **HPTi, Reston, VA |
| P-19 | "Device Performance and Package Induced Self Heating
Effects at Cryogenic Temperatures" A. Akturk, N. Goldsman, Z. Dilli, M. Peckerar, University of Maryland, College Park, MD |
| P-20 | "Flow Simulation: Advanced Dielectric Etch Equipment
Design and Process Development" K. Bera, J. Carducci, D. Hoffman, S. Ma, Applied Materials Inc., Sunnyvale, CA |
| P-21 | "Atomistic-Level Modeling for Thickness Dependence of
Electron Mobility in InSb QW-FETs" X. Guan, J. Lu, Y. Wang, Z. Yu, Tsinghua University, Beijing, P.R. China |
| P-22 | "Simulation of Multiple Gate FinFET Device Gate
Capacitance and Performance with Gate Length and
Pitch Scaling" H. Zhao, N. Agrawal, R. Javier*, S. C. Rustagi**, M. Jurczak*, Y-C. Yeo, G. -S. Samudra, National University of Singapore, Singapore, *IMEC, Heverlee, Begium, **Institute of Microelectronics, Singapore |
| P-23 | "On the Analysis of Random Doping Induced Fluctuations in
Ultra Small Semiconductor Devices by Linearization" P. Andrei, Florida State University, Tallahassee, FL |
| P-24 | "Modeling of Stress-dependent Wet Etch Characteristic for
P-SOG STI Process" J-G. Min, S-H. Rha, T-K. Kim, U-H. Kwon, J-S. Goo, Y-K. Park, J-T. Kong, Samsung Electronics Co. Ltd., Gyeonggi-Do, Korea |
| P-25 | "Low-Field Mobility in Strained Silicon with 'Full Band'
Monte Carlo Simulation using k.p and EPM Bandstructure" M. Feraille, D. Rideau, A. Ghetti*, A. Poncet**, C. Tavernier, H. Jaouen, STMicroeletronics, Crolles, France, *STMicroelectronics, Agratre Brianza, Italy, **Laboratoire de Physique de la Matiere, Villeurbanne, France |
| P-26 | "3-Dimensional Analysis on the GIDL Current of Body-tied
Triple Gate FinFET" H-S. Byun, W-S. Lee, J-W. Lee, K-H. Lee, Y-K. Park, J-T. Kong, Samsung Electronics Co. Ltd, Gyeonggi-Do, Korea |
| P-27 | "Modeling of High Frequency Noise
in SiGe HBTs" P. Sakalas*,**, A. Chakravorty*, M. Schroter*,***, M. Ramonas**,****, J. Herricht*, A. Shimukovitch**, C. Jungemann****, *Dresden University of Technology, Dresden, Germany, **Semiconductor Physics Institute, Vilnius, Lithuania, ***University of California, San Diego, CA, ****Bundeswehr University Munich, Neubiberg, Germany |
| P-28 | "Numerical Analysis of Destruction Mechanisms of NPT-
and FS-IGBTs in Forward Blocking Mode" U. Knipper, G. Wachutka, F. Pfirsch*, T. Raker* Munich University of Technology, Munich, Germany *Infineon Technologies AG, Munich, Germany |
| P-29 | "Monte Carlo Simulation of 3D NonVolatile Memory" Y. Ohkura, C. Suzuki, Semiconductor Leading Edge Technologies, Inc., Tsukuba, Japan |