|
Thursday,
September 2, 2004 |
|
|
|
|
Session 5: Device Analysis
Location: Conference
Room London
|
14:00 |
Simulation Study of Simple CMOS-Compatible
Thin-SOI Vertical Bipolar Transistors on Thin BOX with an Inversion
Collector
Ouyang, Q., Ning, T. H.
|
|
IBM
Semiconductor Research and Development Center (SRDC)
IBM Research Division, T. J. Watson Research Center, Yorktown Heights,
NY 10598 |
|
|
14:20
|
Current
collapse associated with surface states in GaN-based HEMT's.
Theoretical/experimental investigations
Sleiman1,
A., Di Carlo1, A., Verzellesi2, G., Meneghesso3,
G., Zanoni3, E.
|
|
1 Dept. of Electronic
Engineering, University of Rome “Tor Vergata”, Italy
2
Dipartimento di Ingegneria dell’Informazione, Università di
Modena e Reggio Emilia, and
INFM, Italy
3
Dipartimento di Ingegneria dell’Informazione, Università di
Padova, and INFM, Italy
|
|
|
14:40
|
Implications
of Gate Misalignment for Ultra-narrow Multi-gate Devices
Krivokapic1,
Z., Moroz2, V.
|
|
1 AMD,
Technology Research Group,M/S 143, One AMD Place, Sunnyvale, USA
2
Synopsis, Mountain View, USA
|
|
|
15:00
|
Coffee
Break
|
|
|
15:30
|
Source-Side
Injection Modeling by Means of the Spherical-Harmonics Expansion of the
BTE
Lorenzini,
M., Wellekens, D., Haspeslagh, L., Van Houdt, J.
|
|
IMEC—Interuniversity
Microelectronics Center, Belgium |
|
|
15:50
|
Investigation
of a novel tunneling transistor by MEDICI simulation
Wang,
P.-F., Nirschl, T., Schmitt-Landsiedel, D., Hansch, W.
|
|
Institute
for Technical Electronics, Technical University Munich, Germany |
|
|
16:10
|
Optimization
of BAW resonator performance using combined simulation techniques
Thalhammer,
R., Marksteiner, S.
|
|
Infineon
Technologies, Germany |
|